This invention relates to digital code conversion arrangements. More particularly, the invention is concerned with providing a code conversion arrangement in which the relationship between the input and output codes can be readily be varied according to requirements.
It is known to construct a code conversion arrangement in the form of a tree of logical gates. However, if such an arrangement is to operate in a variable manner, a multiplicity of such logical trees must be provided, which results in a considerable degree of cost and complexity.
Another way of implementing a code conversion arrangement is to use a memory as a conversion table, the memory being addressed by the input codes and storing the desired output codes at the appropriate locations. The relationship between the input and output codes can then easily be varied, simply by re-writing the contents of the memory. However, where the number of possible input codes is large, the memory must also be large. Moreover, in many applications, it is only necessary at any given time to assign output codes to a relatively small subset of the possible input codes, and so many of the locations of the memory will not be used. Thus, this method tends to be extravagant in its use of memory space.
It is also possible to use a contents addressable memory (CAM) instead of a conventionally addressable memory. However, in the present state of the art, contents addressable memories are rather expensive.